1. Field
Embodiments of the invention relate to a semiconductor device and a method of manufacturing a semiconductor device.
2. Description of the Related Art
For example, a diode or an insulated gate bipolar transistor (IGBT) with a breakdown voltage of 600 V or 1200 V has been known as a power semiconductor device. The power semiconductor device is generally used in a power conversion device, such as a converter or an inverter, and needs to have characteristics such as low loss, low power consumption, a high processing speed, and high efficiency. In recent years, a semiconductor device in which a drift layer has a field stop (FS) layer structure has been proposed as the power semiconductor device for achieving the characteristics.
The FS layer structure has an impurity concentration higher than the drift layer and has a gentle concentration gradient such that the depletion layer does not reach the cathode of the diode (the collector of the IGBT) when the semiconductor device is turned off. In addition, in the FS layer structure, a region with the same conduction type as the drift layer is provided on the cathode side of the drift layer (the collector side in the IGBT). The use of the FS layer structure makes it possible to prevent punch-through when an off-voltage is applied. When the FS layer structure is used, it is possible to obtain the same breakdown voltage as that in a semiconductor device without the FS layer structure even though the thickness of the drift layer is small. As a result, it is possible to reduce the on-voltage. In addition, since the thickness of the drift layer is small, the number of excess carriers in the drift layer is reduced. Therefore, it is possible to reduce the reverse recovery loss of the diode (turn-off loss in the IGBT).
When the semiconductor device with the FS layer structure is manufactured (produced), the following method has been used as a method for preventing the breaking of a wafer during a wafer process. A thick wafer is put to the wafer process. First, a semiconductor function region (including an aluminum (Al) electrode film) required for a device is formed on the front surface of the wafer. Then, the rear surface of the wafer is ground such that the thickness of the wafer is reduced to a value substantially equal to that in the finish process. Then, n-type impurity ions, such as phosphorus (P) ions or selenium (Se) ions, are implanted into the ground rear surface of the wafer to form an FS layer.
However, in this method, it is difficult to perform heat treatment for activating the FS layer after the ions are implanted into the rear surface of the wafer at a temperature equal to or higher than the deterioration temperature of the Al electrode film on the front surface of the wafer. Therefore, when the heat treatment for activating the FS layer needs to be performed at a temperature equal to or higher than the deterioration temperature of the Al electrode film on the front surface of the wafer, the Al electrode film needs to be formed on the front surface of the wafer with a small thickness (hereinafter, referred to as a thin wafer) after the FS layer is formed, that is, after the rear surface of the wafer is ground. As a result, the number of processes increases in the thin wafer state. Therefore, there is a concern that the wafer will be likely to be broken and yield will be reduced.
In order to solve the problem that the number of processes increases in the thin wafer state after the rear surface is ground, a new method has been developed which forms an FS layer structure including an n buffer layer (corresponding to the FS layer) that is obtained by changing a crystal defect formed in the drift layer by proton radiation into a donor. According to this method, it is possible to activate the FS layer at a temperature lower than the deterioration temperature of the Al electrode film. In addition, a diode or an IGBT has been proposed in which a broad buffer (BB) layer structure is provided in a drift layer in order to reduce the loss or oscillation of the diode or the IGBT (for example, see the following Patent Literature 1).
Next, the structure of the diode according to the related art will be described. FIG. 7 is a schematic cross-sectional view illustrating the structure of a general pin (p-intrinsic-n) diode according to the related art. FIG. 10 is a schematic cross-sectional view illustrating the structure of a pin diode including a BB layer structure according to the related art. FIG. 8 is a characteristic diagram illustrating an impurity concentration distribution taken along the line X-X′ of FIGS. 7 and 10. In the BB layer structure, an n-type drift layer 2, which is a silicon semiconductor substrate (n− semiconductor substrate) 1, includes a BB layer 7 (donor layer) with an impurity concentration distribution which has the maximum impurity concentration at a depth corresponding to near the center of the silicon semiconductor substrate and has an impurity gradient in which the impurity concentration is gently reduced in two directions, that is, toward both an anode region 4 and a cathode region 5. In FIGS. 7 and 10, the same reference numerals indicate portions with the same function. In FIGS. 7 and 10 and the cross-sectional views other than FIGS. 7 and 10, A indicates an anode terminal and a K indicates a cathode terminal.
A method of forming the BB layer 7 using proton radiation has been known as the method of forming the BB layer structure. This method performs proton (H+) radiation having, as a range, a depth to near the center of the n-type drift layer 2 of the silicon semiconductor substrate 1 formed by an FZ (floating zone) and then performs a heat treatment to change a crystal defect formed by the proton radiation into a donor, thereby forming the BB layer 7. In addition, a method has been known which introduces oxygen (O2) into an n-type drift layer during proton radiation and improves the impurity concentration and electron mobility of a BB layer when the crystal defect formed by the proton radiation is changed into a donor (for example, see the following Patent Literature 2).
Furthermore, a structure has been proposed in which a termination process is performed for a crystal defect formed by the implantation of hydrogen ions to reduce a leakage current or the peak intensity (hereinafter, referred to as DLTS signal peak intensity) of trap density measured by a deep level transient spectroscopy (DLTS) method is high in the crystal defect with a trap level generated by the hydrogen termination process (for example, see the following Patent Literature 3). In addition, a method has been proposed which introduce a vacancy into the wafer formed by the CZ (Czochralski) method using proton radiation, performed a heat treatment to diffuse oxygen to the outside, and forms a low-oxygen precipitation layer (for example, see the following Patent Literature 4).